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Discuss an HLS project

A few lines about your project are enough to start. A complete specification is not required.

Three useful starting points

Include whatever you know. Each is optional, and anything undecided can wait.

  • The block. What algorithm or design are you working on?
  • The target. An ASIC technology or FPGA family, if known.
  • The decision. What do you need to find out or deliver?

Share only what you are comfortable sending at this stage. Confidentiality and a secure exchange process can be agreed before sensitive material is shared.

More context, if available

Technical inputs

  • Existing C++ or SystemC models, or a Verilog/VHDL boundary.
  • Interfaces, memories, clocking, reset, and integration constraints.
  • Throughput, latency, area, power, and numeric-accuracy requirements.
  • Reference outputs, tests, workloads, or a passing RTL regression.
  • The current project stage and decision or delivery timeline.

Questions to settle during scoping

  • Is a confidentiality agreement or particular secure exchange process needed?
  • How should source, generated RTL, scripts, constraints, and project IP be owned and delivered?
  • Which HLS, simulation, synthesis, library, and target-platform access will be available?
  • What defines acceptance: tests, co-simulation, reports, implementation results, or integration regressions?
  • Would the work be remote, on-site, or a combination?

See the services FAQ for short answers to common questions.

Choose a useful next step

A short technical call, design review, or bounded HLS feasibility study can help clarify the scope. If the requirements and acceptance evidence are already agreed, work can start with design and delivery.